Putting PMIC in sleep-state risks hardware damage (Bug #143)
Commit 672e2b147 which introduced proper shutdown chose to let the PMIC go into sleep-state (aka "RTC-only mode") rather than off-state. This was fine for rev A5 on which that patch was tested, but since then two changes have been made to the power supply scheme:
- (rev A6) enable of the 3v3b regulator moved from LDO2 to LDO4 (3v3a)
- side-effect: 3v3b rail remains on in sleep-mode (also in off-mode when battery-powered)
- (rev A6A) am335x vdds supply moved from LDO3 to LDO1
- side-effect: vdds remains supplied in sleep-mode
As a result heavy leakage occurs from vdds (directly) and 3v3b (via i/o pins) to the 3v3a. The amount of current depends on external connections, but for example leaving a serial console cable connected in this state resulted in serious violation of am335x absolute maximum ratings, with potential for hardware damage.
TI kernel commit c85d82b7c fixes the problem, but apparently it was never sent upstream. This fix needs to be urgently applied to any kernel which includes 672e2b147!
For an in-depth discussion of the first of the two aforementioned power supply issues (in the context of battery-powered operation, where it also manifests in off-mode) see this post and its follow-ups. My most recent follow-up also makes a brief observation on the vdds issue and after further investigation I've asked TI for clarification (no response yet).
It is perhaps worth mentioning the regulator issue already existed on the BeagleBone White, except there the regulator feeds only the 3v3exp and problematic leakage is therefore dependent on CAPE present. On the BBB the 3v3b and 3v3exp supplies were merged and on-board hardware already suffices to cause problems (although a CAPE can still make it worse).
The BBB originally fixed this issue, however in a rather suboptimal way, causing brief (1ms) leakage from 3v3b to 3v3a during powerup and shutdown. Rev A6 reverted this change, and no proper fix was ever done.